Samsung Electronics builds 10nm-class seventh-generation DRAM test line at Pyeongtaek P2 plant

Samsung Electronics has established a 10nm-class (1d) seventh-generation DRAM test line at its Pyeongtaek P2 plant. This test line is a facility used to test the mass production potential of new semiconductor products. Once the performance of the next-generation chip is determined in the R&D stage, wafers will be introduced here to start improving the mass production yield. Although it is not clear how big the Samsung Pyeongtaek 10nm-class seventh-generation DRAM plant is, a test line is usually installed that can process about 10,000 wafers per month.